07:18:02 **** Build of configuration Release for project MyProject ****
make all
Building file: C:/Users/Temp/wd/nuvoton/M031BSP/M031BSP-M29jul2024/SampleCode/NuCodeGen/MyProject/clk_conf.c
Invoking: Cross ARM GNU C Compiler
arm-none-eabi-gcc -mcpu=cortex-m0 -mthumb -Os -fmessage-length=0 -fsigned-char -ffunction-sections -fdata-sections -g -D__HXT=32000000ul -D__LXT=32768ul -I"C:/Users/Temp/wd/nuvoton/M031BSP/M031BSP-M29jul2024/SampleCode/NuCodeGen/MyProject/GCC/../../../../Library/Device/Nuvoton/M031/Include" -I"C:/Users/Temp/wd/nuvoton/M031BSP/M031BSP-M29jul2024/SampleCode/NuCodeGen/MyProject/GCC/.." -I"C:/Users/Temp/wd/nuvoton/M031BSP/M031BSP-M29jul2024/SampleCode/NuCodeGen/MyProject/GCC/../../../../Library/SmartcardLib/Include" -I"C:/Users/Temp/wd/nuvoton/M031BSP/M031BSP-M29jul2024/SampleCode/NuCodeGen/MyProject/GCC/../../../../Library/StdDriver/inc" -I"C:/Users/Temp/wd/nuvoton/M031BSP/M031BSP-M29jul2024/SampleCode/NuCodeGen/MyProject/GCC/../../../../Library/CMSIS/Include" -std=gnu11 -MMD -MP -MF"User/clk_conf.d" -MT"User/clk_conf.o" -c -o "User/clk_conf.o" "C:/Users/Temp/wd/nuvoton/M031BSP/M031BSP-M29jul2024/SampleCode/NuCodeGen/MyProject/clk_conf.c"
C:/Users/Temp/wd/nuvoton/M031BSP/M031BSP-M29jul2024/SampleCode/NuCodeGen/MyProject/clk_conf.c: In function 'Clock_Init':
C:/Users/Temp/wd/nuvoton/M031BSP/M031BSP-M29jul2024/SampleCode/NuCodeGen/MyProject/clk_conf.c:45:93: error: 'CLK_PWRCTL_MIRCEN_Msk' undeclared (first use in this function)
CLK_EnableXtalRC(CLK_PWRCTL_LIRCEN_Msk | CLK_PWRCTL_HIRCEN_Msk | CLK_PWRCTL_HXTEN_Msk | CLK_PWRCTL_MIRCEN_Msk);
^~~~~~~~~~~~~~~~~~~~~
C:/Users/Temp/wd/nuvoton/M031BSP/M031BSP-M29jul2024/SampleCode/NuCodeGen/MyProject/clk_conf.c:45:93: note: each undeclared identifier is reported only once for each function it appears in
C:/Users/Temp/wd/nuvoton/M031BSP/M031BSP-M29jul2024/SampleCode/NuCodeGen/MyProject/clk_conf.c:48:98: error: 'CLK_STATUS_MIRCSTB_Msk' undeclared (first use in this function)
CLK_WaitClockReady(CLK_STATUS_LIRCSTB_Msk | CLK_STATUS_HIRCSTB_Msk | CLK_STATUS_HXTSTB_Msk | CLK_STATUS_MIRCSTB_Msk);
^~~~~~~~~~~~~~~~~~~~~~
C:/Users/Temp/wd/nuvoton/M031BSP/M031BSP-M29jul2024/SampleCode/NuCodeGen/MyProject/clk_conf.c:51:17: error: 'CLK_CLKSEL0_HCLKSEL_MIRC' undeclared (first use in this function)
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_MIRC, CLK_CLKDIV0_HCLK(1));
^~~~~~~~~~~~~~~~~~~~~~~~
C:/Users/Temp/wd/nuvoton/M031BSP/M031BSP-M29jul2024/SampleCode/NuCodeGen/MyProject/clk_conf.c:57:27: error: 'FMCIDLE_MODULE' undeclared (first use in this function)
CLK_EnableModuleClock(FMCIDLE_MODULE);
^~~~~~~~~~~~~~
User/subdir.mk:30: recipe for target 'User/clk_conf.o' failed
make: *** [User/clk_conf.o] Error 1
"make all" terminated with exit code 2. Build might be incomplete.
07:18:06 Build Failed. 6 errors, 0 warnings. (took 4s.437ms)
Indeed, those four defines are absent in the BSP. In fact, they make no sense: The data sheet and the TRM of the m031 show that the Clock Generator includes only HIRC, LIRC, HXT & LXT. And the calls to CLK_EnableModuleClock() use UART0_MODULE and the like; 'FMCIDLE_MODULE' is completely absent. void Clock_Init(void)
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init System Clock */
/*---------------------------------------------------------------------------------------------------------*/
//CLK->PWRCTL = (CLK->PWRCTL & ~(0x0008000DUL)) | 0x0079001FUL;
//CLK->CLKDIV0 = (CLK->CLKDIV0 & ~(0x00FFFFFFUL)) | 0x00000000UL;
//CLK->CLKDIV1 = (CLK->CLKDIV1 & ~(0xFF0000FFUL)) | 0x00000000UL;
//CLK->CLKDIV4 = (CLK->CLKDIV4 & ~(0x0000000FUL)) | 0x00000000UL;
//CLK->PCLKDIV = (CLK->PCLKDIV & ~(0x00000077UL)) | 0x00000000UL;
//CLK->CLKSEL0 = (CLK->CLKSEL0 & ~(0x0000013FUL)) | 0x0000003DUL;
//CLK->CLKSEL1 = (CLK->CLKSEL1 & ~(0x7777777FUL)) | 0x4477773BUL;
//CLK->CLKSEL2 = (CLK->CLKSEL2 & ~(0x7000033FUL)) | 0x2000032BUL;
//CLK->CLKSEL3 = (CLK->CLKSEL3 & ~(0x07000003UL)) | 0x04000003UL;
//CLK->AHBCLK = (CLK->AHBCLK & ~(0x3F00908EUL)) | 0x00008004UL;
//CLK->APBCLK0 = (CLK->APBCLK0 & ~(0x180733FFUL)) | 0x00000001UL;
//CLK->APBCLK1 = (CLK->APBCLK1 & ~(0xC00F1701UL)) | 0x00000000UL;
//CLK->CLKOCTL = (CLK->CLKOCTL & ~(0x0000007FUL)) | 0x00000000UL;
//SysTick->CTRL = (SysTick->CTRL & ~(0x00000005UL)) | 0x00000000UL;
//RTC->LXTCTL = (RTC->LXTCTL & ~(0x00000080UL)) | 0x780F010EUL;
/* Enable clock source */
CLK_EnableXtalRC(CLK_PWRCTL_LIRCEN_Msk | CLK_PWRCTL_HIRCEN_Msk | CLK_PWRCTL_HXTEN_Msk | CLK_PWRCTL_MIRCEN_Msk);
/* Waiting for clock source ready */
CLK_WaitClockReady(CLK_STATUS_LIRCSTB_Msk | CLK_STATUS_HIRCSTB_Msk | CLK_STATUS_HXTSTB_Msk | CLK_STATUS_MIRCSTB_Msk);
/* Set HCLK clock */
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_MIRC, CLK_CLKDIV0_HCLK(1));
/* Set PCLK-related clock */
CLK->PCLKDIV = (CLK_PCLKDIV_APB0DIV_DIV1 | CLK_PCLKDIV_APB1DIV_DIV1);
/* Enable IP clock */
CLK_EnableModuleClock(FMCIDLE_MODULE);
CLK_EnableModuleClock(ISP_MODULE);
CLK_EnableModuleClock(WDT_MODULE);
CLK_EnableModuleClock(WWDT_MODULE);
/* Set IP clock */
CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, MODULE_NoMsk);
CLK_SetModuleClock(WWDT_MODULE, CLK_CLKSEL1_WWDTSEL_HCLK_DIV2048, MODULE_NoMsk);
/* Update System Core Clock */
/* User can use SystemCoreClockUpdate() to calculate SystemCoreClock. */
SystemCoreClockUpdate();
return;
}
Clearly, the CLK_EnableModuleClock() calls are wrong. I did not even specify a watchdog timer.Reply
/* Switch UART0 clock source to HIRC */
CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART0SEL_HIRC, CLK_CLKDIV0_UART0(1));
This resulted in the compilation moving forward. However, it choked on a series of header files and a linker file! I'd expected the generated eclipse file to have taken care of all that, as it had insisted to be within the BSP tree. But, it did not. I manually added all the -I include paths, and the path to nanoController