FAQ_MA35D1_SSPCC Clock and CLK_SYSCLK1 Operating

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Posts: 68
Joined: 08 Nov 2022, 10:28

02 Dec 2022, 16:56

For example, you can read/write WDT register at Linux stage but not CLK_SYSCLK1(0x40460208) and SSPCC.

SSPCC belong to TZS register, so it only can be modified at TF-A stage.

Linux kernel doesn’t allow users modify CLK_SYSCLK1, so you need to modify clock source code and compile it again.


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