First, you need to modify MA35D1 device tree description.
There are two methods you can use
You can modify ma35d1.dtsi or modify dts to override the description
The display clock use clk_VPLL, so you need to modify it to match your display
For example, the display panel provided by Nuvoton is compatible with 51 MHz, and the display driver will let 102 MHz is divided by 2.
If you need display clock 100 MHz, the VPLL should be 200MHz
ma35d1.dtsi
Code: Select all
clk: clock-controller@40460200 {
...
assigned-clocks = <&clk CAPLL>,
<&clk DDRPLL>, <&clk APLL>,
<&clk EPLL>, <&clk VPLL>;
assigned-clock-rates =<1000000000>,
<266000000>, <200000000>,
<500000000>, <102000000>;
...
};
ma35d1-som-256m.dts
Code: Select all
&clk{
assigned-clock-rates =<1000000000>,
<266000000>, <282240000>,
<500000000>, <102000000>;
};