Why can’t some BSP samples be executed in Free run mode (boot from SPI) in the IAR environment?

[a_ziliu]

Since the NUC505 is internally SPI Flash, the execution speed is slow. To increase the execution speed in the Debug mode, use the sram.icf file in the Linker to set the RAM at 0x10000-0x1FFFF, and put the code into the SRAM as shown in Figure 1. However, this setting can only be executed in Debug mode. When switching to Free run mode (boot from SPI), user must modify the icf file in Linker and place the RAM at the correct address. Users can set RAM address by directly using the spirom.icf in the BSP, as shown in Figure 2. The path is NUC505BSPV3.02.000\SampleCode\BootTemplate\CriticalOnSRAM\IAR.

Figure 1. sram.icf Setting for RAM Address

Figure 2. spirom.icf Setting for RAM Address