How to set the High Slew Rate Control Register to increase the SPI frequency to 36 MHz without causing waveform distorti

[a_ziliu]

When GPIO is configured to SPI mode, the High Slew Rate I/O is disabled by default. The user must set the GPIO High Slew Rate Control Register to enable the High Slew Rate I/O mode for adjusting the SPI frequency to 36MHz

The programming example is as follows:
//Set SYS MFP to SPI mode
SYS->GPB_MFPL |= (SYS_GPB_MFPL_PB2MFP_SPI0_CLK | SYS_GPB_MFPL_PB3MFP_SPI0_MISO0 | SYS_GPB_MFPL_PB4MFP_SPI0_SS | SYS_GPB_MFPL_PB5MFP_SPI0_MOSI0);

//Set GPIO to High Slew Rate I/O mode
PB->SLEWCTL |= (GPIO_SLEWCTL_HSREN2_Msk | GPIO_SLEWCTL_HSREN3_Msk | GPIO_SLEWCTL_HSREN4_Msk | GPIO_SLEWCTL_HSREN5_Msk);