NUC972DF62Y LCD FIFO Under-Run Interrupt

[KishchukOleksandr]

I work with NUC972DF62Y and use LCM and GE2D module.
What causes to FIFO Under-Run Interrupt, and how I have to handle it?
After clearing UNDERRUN_INT flag, it set again.

[Wright]

Hi
There’s insufficient DDR bandwidth.
Please drop LCD pixel clock rate or use 16bpp instead of 24bpp.