I have problem with usb example in nuc472_BSP

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ryan
Posts: 1
Joined: 26 Aug 2019, 13:44

26 Aug 2019, 14:18

my work platform:NUC442RI8AE(with nuc472_BSP:Rev 3.02.001)
example:nuc472_BSP\SampleCode\StdDriver\USBD_Bulk
IAR:IAR C/C++ Compiler for ARM 7.20.5.7591 (7.20.5.7591)
I have succeeded in running uart, timer0, spi0 .but failed on usb bulk example.(stop at Hard_Fault_Handler)
debug break when SYS_Init(I'm not sure about this,cause step in will broke on USBD_Start)
I found these two
1.__HXT (20000000UL) at system_NUC472_442.h
2.# error "The PLL pre-definitions are only valid when external crystal is 12MHz" at clk.h
so I changed __HXT to 12M and #if (__HXT == 12000000UL) in clk.h
but PLL init at SYS_Init still has problem(I close them,code not crash).

here is my SYS_Init

Code: Select all

  /* 
  Enable External XTAL (4~24 MHz) 
  */
  CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
  /* 
  Waiting for 20MHz clock stable 
  */
  
  CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
  
  /* 
  Switch HCLK(CPU clock) clock source to XTAL 
  */
 CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HXT,CLK_CLKDIV0_HCLK(1));
#if 1
  /* Set PLL to power down mode and PLL_STB bit in CLKSTATUS register will be cleared by hardware.*/
  CLK->PLLCTL |= CLK_PLLCTL_PD_Msk;
  
  /* Set PLL frequency */
  CLK->PLLCTL = CLK_PLLCTL_84MHz_HXT;
  
  /* Waiting for clock ready */
  CLK_WaitClockReady(CLK_STATUS_PLLSTB_Msk);
  
  /* Switch HCLK clock source to PLL */
  CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_PLL,CLK_CLKDIV0_HCLK(1));

#endif  
  /* 
  Enable IP clock
  */
//  CLK_EnableModuleClock(UART0_MODULE);
  CLK_EnableModuleClock(UART3_MODULE);
  CLK_EnableModuleClock(UART4_MODULE);
  CLK_EnableModuleClock(TMR0_MODULE);
  CLK_EnableModuleClock(SPI0_MODULE);
  CLK_EnableModuleClock(USBD_MODULE);
  
  /* 
  Select IP clock source 
  */
//  CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UARTSEL_HXT, CLK_CLKDIV0_UART(1));
  CLK_SetModuleClock(UART3_MODULE, CLK_CLKSEL1_UARTSEL_PLL, CLK_CLKDIV0_UART(1));
  CLK_SetModuleClock(UART4_MODULE, CLK_CLKSEL1_UARTSEL_PLL, CLK_CLKDIV0_UART(1));
  CLK_SetModuleClock(TMR0_MODULE, CLK_CLKSEL1_TMR0SEL_HXT, 0);
  
/* Enable USB PHY */
  SYS->USBPHY = 0x100;	  // USB device
when I close this one " /* Switch HCLK clock source to PLL */",
system runned ok ,only had wrong UART baud rate( received data but bytes totally wrong)
So my question is
1.I need usb worked ,so must use 12MHz External XTA?
2.how I configure other device clock(timer0,uart)?

BokarevSF
Posts: 2
Joined: 07 Jul 2019, 05:53

31 Aug 2019, 00:48

Что-то я уже в отчаянии : У меня появляется фраза «The default termbase has been changed so the indexes have been changed», и потом все базы активны - всё как на скринах в этой теме. Проект открыла - но тогда, если я верно понимаю, в окне Term recognition должны появляться подсказки из баз терминов? Я специально вставила в один из сегментов термин, который точно есть в одной из баз данных, однако при переводе этого сегмента подсказки отсутствуют : Что я делаю не так?
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PambMadia
Posts: 6
Joined: 18 Dec 2018, 06:41
Contact:

19 Oct 2019, 07:17

i have problem with sick safety sensor c4000 ,
i use two sensor one host and another guest ,
both transmitte and recieve sensor connect with other ,
i want to seperate to sensor,
or i want to remove guest and use only host

<a href=https://prom-electric.ru/>.</a>

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