Search found 208 matches
- 31 May 2021, 16:02
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: Why can’t some BSP samples be executed in Free run mode (boot from SPI) in the IAR environment?
- Replies: 0
- Views: 2263
Why can’t some BSP samples be executed in Free run mode (boot from SPI) in the IAR environment?
Since the NUC505 is internally SPI Flash, the execution speed is slow. To increase the execution speed in the Debug mode, use the sram.icf file in the Linker to set the RAM at 0x10000-0x1FFFF, and put the code into the SRAM as shown in Figure 1. However, this setting can only be executed in Debug mo...
- 31 May 2021, 16:01
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: Will GPIO maintain its original state at wake-up reset as GPIO remains its original state after entering SPD mode?
- Replies: 0
- Views: 2455
Will GPIO maintain its original state at wake-up reset as GPIO remains its original state after entering SPD mode?
GPIO can maintain its original state after entering Standby Power-down mode (SPD0/1 mode). However, after wake-up reset, the GPIO status may be reset due to different trigger sources. The GPIO status includes MFP, I/O modes, and High/Low. In summary, the GPIO state can be maintained when the trigger...
- 31 May 2021, 16:01
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: Why are parts of the M0519 pins unable to control the output to a high or low state after being configured as the GPIO f
- Replies: 0
- Views: 2294
Why are parts of the M0519 pins unable to control the output to a high or low state after being configured as the GPIO f
Since the pins with EPWM0, EPWM1, and BPWM output functions (P0.0 - P0.5, P1.0 - P1.5, P5.6 - P5.7) are often used to control the upper and lower MOSFET of bridge circuit. To avoid MOSFET damage caused by simultaneous high output at power-on, the initial state of these pins is determined by Config0[...
- 31 May 2021, 16:01
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: In the NuMicro® Cortex®-M0 family, how much current sink and source can each I/O withstand?
- Replies: 0
- Views: 2321
In the NuMicro® Cortex®-M0 family, how much current sink and source can each I/O withstand?
As different designs and processes will affect I/O physical limits, detailed I/O electrical characteristics can be found in the Electrical characteristic section of each Datasheet. In general, the I/O of the NuMicro® Cortex®-M0 family can withstand approximately 30 mA of current sink and source. Ple...
- 31 May 2021, 16:00
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: Can offline programming encrypt the chip like the NuMicro ICP Programming Tool?
- Replies: 0
- Views: 2312
Can offline programming encrypt the chip like the NuMicro ICP Programming Tool?
Yes, the principle and process of offline programming are as follows: (1) Download the binary file from the PC to a device with offline flash, such as Nu-Link or Nu-Link-Pro; (2) Remove the device with offline Flash from the PC; (3) Connect the device with offline Flash to the chip to be updated for...
- 31 May 2021, 16:00
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: Why is the Boot Select setting in the Config0/1 not valid in Keil ICE Debug mode?
- Replies: 0
- Views: 2404
Why is the Boot Select setting in the Config0/1 not valid in Keil ICE Debug mode?
In the ICE Debug mode, the code will be programmed in the area selected by the Flash Select field (APROM or LDROM) and boot from this area instead of booting from the area set by Boot Select in the Config0/1. Therefore, regardless of the Boot Select setting in the Config0/1, in Debug mode, the code ...
- 31 May 2021, 16:00
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: When using the Nano112 to drive the LCD, what happens if the pin that is not used to drive the LCD is also configured as
- Replies: 0
- Views: 2309
When using the Nano112 to drive the LCD, what happens if the pin that is not used to drive the LCD is also configured as
When using the Nano112 to drive the LCD, if other pins are also configured as the LCD function, the pins connected to the LCD will be affected and the LCD drive waveform output may be abnormal, resulting in blurred display. Therefore, pins that are not connected to the LCD should not be configured a...
- 31 May 2021, 15:59
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: What to do when the NUC505 USBD is set to Full-speed mode and the master sends the "SET REPORT" command but the NUC505 i
- Replies: 0
- Views: 2305
What to do when the NUC505 USBD is set to Full-speed mode and the master sends the "SET REPORT" command but the NUC505 i
When the NUC505 USBD is in Full-speed mode, due to hardware limitations, the master will be unable to be detected normally after sending the "SET REPORT" command. This can be solved by setting the Set Endpoint buffer to increase the length by 4 Bytes. /* Control endpoint */ USBD_SetEpBufAddr(CEP, CE...
- 31 May 2021, 15:59
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: When does the CAN BUS node automatically start to adjust the baud rate setting in an unknown baud rate network?
- Replies: 0
- Views: 2362
When does the CAN BUS node automatically start to adjust the baud rate setting in an unknown baud rate network?
The CAN BUS node in the unknown baud rate network will generate bus errors if its baud rate is not consistent with the bus. As long as the following two conditions are met, the CAN BUS will automatically adjust the baud rate until it receives the correct data. In the CAN status register, the Epass (...
- 31 May 2021, 15:58
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: Why did the program enter the interrupt service routine after interrupt flag has been cleared?
- Replies: 0
- Views: 2358
Why did the program enter the interrupt service routine after interrupt flag has been cleared?
This is because the corresponding peripheral interrupt flag in the NVIC_ICPR register has not been cleared. In the Cortex-M architecture, the order in which interrupt service routine executed is controlled through the NVIC. There are two flags in this issue. One is the internal interrupt flag in the...