Search found 207 matches
- 31 May 2021, 15:58
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: In the M453 series related audio applications, SPI1 or SPI2 are used as I2S function.
- Replies: 0
- Views: 901
In the M453 series related audio applications, SPI1 or SPI2 are used as I2S function.
The following figure shows the SPI1 and SPI2 block diagram of the M453 series. The SPI function pins can be Master or Slave. MOSI (Master Output Slave Input): This pin is the output when the SPI is Master; it is the input when the SPI is the Slave. MISO (Master Input Slave Output): This pin is the i...
- 31 May 2021, 15:57
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: Can UCID (Unique Company ID) in a chip be set by users through programming or a downloader?
- Replies: 0
- Views: 900
Can UCID (Unique Company ID) in a chip be set by users through programming or a downloader?
No, the UCID can only be generated in the IC production process and cannot be set or modified by users.
- 31 May 2021, 15:57
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: How to switch between the 5V and 3.3V operating voltage in Nu-Link-Me?
- Replies: 0
- Views: 901
How to switch between the 5V and 3.3V operating voltage in Nu-Link-Me?
The operating voltages in the Nu-Link-Me can be switched by changing zero-ohm resistance welding joints. (1) As marked in a red rectangle below, 5V is shorted to VCC, and the Nu-Link-Me is operated at 5V. (2) As marked in a red rectangle below, 3.3V is shorted to VCC, and the Nu-Link-Me is operated ...
- 31 May 2021, 15:57
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: What is the relationship between the logic“1”and input voltage of chip pins?
- Replies: 0
- Views: 872
What is the relationship between the logic“1”and input voltage of chip pins?
The logic“1”voltage of chip pins is the same as the input voltage of the corresponding power domain.
For example,
Input Voltage = 3.3 V => Logic“1”Voltage = 3.3 V
Input Voltage = 4.56789 V => Logic“1”Voltage = 4.56789 V.
For example,
Input Voltage = 3.3 V => Logic“1”Voltage = 3.3 V
Input Voltage = 4.56789 V => Logic“1”Voltage = 4.56789 V.
- 31 May 2021, 15:56
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: How to update firmware when using NuMicro® family chips to develop products?
- Replies: 0
- Views: 857
How to update firmware when using NuMicro® family chips to develop products?
With the In-System Programming (ISP), the ISP code corresponding to the peripheral interface is programmed in the LDROM. Also, APROM, Data Flash, and Config in the chip can be updated through peripheral interfaces, such as USB, UART, SPI, I²C, RS-485, and CAN. You can download NuMicro® ISP programmi...
- 31 May 2021, 15:56
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: How to set the High Slew Rate Control Register to increase the SPI frequency to 36 MHz without causing waveform distorti
- Replies: 0
- Views: 826
How to set the High Slew Rate Control Register to increase the SPI frequency to 36 MHz without causing waveform distorti
When GPIO is configured to SPI mode, the High Slew Rate I/O is disabled by default. The user must set the GPIO High Slew Rate Control Register to enable the High Slew Rate I/O mode for adjusting the SPI frequency to 36MHz The programming example is as follows: //Set SYS MFP to SPI mode SYS->GPB_MFPL...
- 31 May 2021, 15:55
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: Why does the first communication fail when the Mini58 served as Slave is woken up through I2C?
- Replies: 0
- Views: 838
Why does the first communication fail when the Mini58 served as Slave is woken up through I2C?
Since the time required to wake up the microcontroller (MCU) is longer than the time when the master generates the I2C start signal, while the host sends the I2C start signal for the first time, the slave MCU is still in the wake-up phase. Therefore, the first communication will fail and the second ...
- 31 May 2021, 15:55
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: How many pull-down resistors are needed to keep I/O low when I/O power-on is initially configured to Quasi-High?
- Replies: 0
- Views: 858
How many pull-down resistors are needed to keep I/O low when I/O power-on is initially configured to Quasi-High?
If the microcontroller’s (MCU’s) GPIO is configured to Quasi-High by default. When the MCU is powered on, the I/O will keep High until I/O mode or output logic is changed. If the component outside the MCU needs to keep logical low, there may be problems with the transient logical high when the MCU i...
- 31 May 2021, 15:55
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: Is there any problem if the system registers is not relocked after the register is unlocked using SYS_UnlockReg()?
- Replies: 0
- Views: 815
Is there any problem if the system registers is not relocked after the register is unlocked using SYS_UnlockReg()?
SYS_UnlockReg() and SYS_UnlockReg() are registers for protecting the system. To modify the system register, you need to unlock it first and then relock it after the modification. There is no problem if it is not locked, but it is recommended to lock the system register to prevent unintended situatio...
- 31 May 2021, 15:54
- Forum: Nuvoton Cortex-M0/M23 MCU
- Topic: Why does a noise occur at regular intervals when the UAC equipment records and plays?
- Replies: 0
- Views: 857
Why does a noise occur at regular intervals when the UAC equipment records and plays?
During UAC recording and playback, if the microcontroller (MCU) and the host clock frequency error occurs, the error will be amplified with time, resulting in MCU USB upload / download buffer overflow. Therefore, a noise occurs. This can be solved by dynamically adjusting the clock frequency of the ...
